根据Barclays Bank分析师Andrew Lu的一篇报告指出，由于可减少栅极漏电流，高介电/金属栅极技术能降低晶体管的待机耗电，不过现在该领域出现了该采用“前栅极(gate-first)”或“后栅极(gate-last)”的争议；所谓的前或后，指的是金属栅极是在半导体制程中的高温活化退火程序(high-temperature activation anneals)之前或之后，沉积到晶圆片上。
“具我们了解，前栅极技术支持者(包括Sematech以及IBM、Infineon、NEC、Globalfoundries、Samsung、ST与Toshiba)都面临包括散热不稳定(thermal instability)、阈值电压飘移(threshold voltage shifts)，以及栅堆栈重新生长(re-growth in the gate stack)等等问题，这对微缩电氧化层厚度的pMOS组件来说是很严重的。”Lu表示。
但针对以上报告，IBM晶圆厂联盟成员GlobalFoundries提出反驳，甚至表示，由于该公司并非上市公司，并未与Barclays Bank等财经市场分析机构定期接触，因此该报告的一些消息可能不是最新的。GlobalFoundries表示，该公司的32纳米高介电/金属栅极制程，目前正在Fab 1进行初步生产。
IBM 'fab club' denies problems with high-k
by Mark LaPedus
Members of IBM Corp.'s technology alliance, namely GlobalFoundries Inc. and Samsung Electronics Co. Ltd., dismissed a report that the group is struggling with its high-k/metal-gate technology.
High-k/metal-gate ''technology enables traditional scaling of the electrical gate dielectric and reduced standby power of transistor due to a reduction in gate leakage,''said Andrew Lu, an analyst with Barclays Bank, in a report.
''There has been a recent divergence in wafer processing technology to either choose 'gate-first' or 'gate-last' for (high-k/metal-gate),'' Lu said. ''Gate-first and gate-last are terms that refer to whether the metal gate electrode is deposited on wafer before or after the high-temperature activation anneals of flow processing.''
Intel Corp., Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) and others have moved towards ''gate-last'' technology. Intel has been shipping processors based on high-k since the 45-nm node. Intel has shipped two generations of high-k. TSMC has yet to ship its technology.
In contrast, IBM's ''fab club'' is using a ''gate-first'' technology. But to date, IBM's technology partners have yet to ship high-k--at least in chips in mass volumes. Advanced Micro Devices Inc. is expected to ship its first processors based on high-k in the first part of 2011. AMD is using IBM's technology.
''The gate-first technology adopters (including Sematech and Fishkill Alliance technology partners such as IBM, Infineon, NEC, Globalfoundries, Samsung, STMicroelectronics and Toshiba) have encountered some problems, we understand, related to thermal instability, threshold voltage shifts and re-growth in the gate stack, which is serious for pMOS (positive type metal oxide semiconductor) at scaled electrical oxide thickness,'' Lu said.
''We expect TSMC will be able to lead its competitors on the 28-nm migration using the gate-last high-k/metal-gate technology,'' Lu said.
One IBM ''fab club'' member, GlobalFoundries, dismissed the report and issued the following response to Lu's research note:
''There have been some misconceptions about the gate-first approach to high-k/metal-gate. We do not regularly engage with financial analysts like Barclay’s because we are a private company, so I don’t think they have the latest information.
Gregg Bartlett, our SVP of technology and R&D, addressed a number of these misconceptions in his presentation at (recent) GTC 2010 (conference). You can see that there are no Vt stability issues and gate-first offers comparable or superior performance when compared to gate-last approaches. Our 32-nm high-k/metal-gate ramp is in early production at Fab 1 and we are confident in our ability to deliver for our customer and maintain our time-to-volume leadership position in the foundry industry. We are currently accepting designs for all of our 28-nm technologies. Multiple customer designs have already been silicon-validated, and many more test chips are in prototyping at Fab 1 on the way to early risk production late this year.''
Samsung Electronics issued this response:
''As you may recall, Samsung announced in early June the full qualification of 32-nm low power high-k metal gate in our S Line. That qual included a full 1000 hr high temp operating life (HTOL) and have experienced no such problems.''